AT32UC3A1256AU Atmel Corporation, AT32UC3A1256AU Datasheet - Page 148

• Manufacturer Part Number: AT32UC3A1256AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A1256AU

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 69
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058K AVR32-01/12
20.5
20.5.1
Application Example
Hardware Interface
Table 20-2.
Table 20-3 on page 148
external devices for each Memory Controller.
Table 20-3.
Notes:
A[22:15]
A[23]
D[15:0]
Signals
Controller
D0 - D7
D8 - D15
A0/NBS0
A1/NWR2/NBS2
A2 - A22
A23
NCS0
NCS1/SDCS0
NCS2
NCS3
NRD/NOE
NWR0/NWE
NWR1/NBS1
NWR3/NBS3
1. NWR1 enables upper byte writes. NWR0 enables lower byte writes.
2. NWRx enables corresponding byte x writes. (x = 0,1,2 or 3)
3. NBS0 and NBS1 enable respectively lower and upper bytes of the lower 16-bit word.
4. NBS2 and NBS3 enable respectively lower and upper bytes of the upper 16-bit word.
5. BEx: Byte x Enable (x = 0,1,2 or 3)
EBI Pins and Memory Controllers I/O Lines Connections
EBI Pins and External Static Devices Connections
EBI Pins
8-bit Static
Device
D0 - D7
details the connections to be applied between the EBI pins and the
A[2:22]
A[23]
WE
CS
CS
CS
CS
OE
A0
A1
–
–
–
Pins of the Interfaced Device
2 x 8-bit
Devices
Not Supported
Not Supported
D[15:0]
D8 - D15
D0 - D7
Static
A[1:21]
SMC
WE
WE
A[22]
CS
CS
CS
CS
OE
A0
–
–
SDRAMC I/O Lines
(1)
(1)
16-bit Static
D8 - D15
Device
D0 - D7
A[1:21]
A[22]
NUB
NLB
WE
CS
CS
CS
CS
OE
A0
–
SMC_A[22:15]
SMC_A[23]
D[15:0]
AT32UC3A
SMC I/O Lines
148