AT32UC3A1256AU Atmel Corporation, AT32UC3A1256AU Datasheet - Page 399

• Manufacturer Part Number: AT32UC3A1256AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A1256AU

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 69
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058K AVR32-01/12
27.6.8.2
Figure 27-33. Clock Rate Transition Occurs while the SMC is Performing a Write Operation
Internal signal from PM
Slow Clock Mode
NBS0, NBS1,
Switching from (to) Slow Clock Mode to (from) Normal Mode
A0, A1
CLK_SMC
This write cycle finishes with the slow clock mode set
A[25:2]
NWE
NCS
Of parameters after the clock rate transition
When switching from slow clock mode to the normal mode, the current slow clock mode transfer
is completed at high clock rate, with the set of slow clock mode parameters.See
page
Figure 27-34
other.
SLOW CLOCK MODE WRITE SLOW CLOCK MODE WRITE
399. The external device may not be fast enough to support such timings.
1
NWE_CYCLE = 3
illustrates the recommended procedure to properly switch from one mode to the
1
1
1
1
Slow clock mode transition is detected:
1
Reload Configuration Wait State
2
NORMAL MODE WRITE
NWE_CYCLE = 7
3
AT32UC3A
Figure 27-33 on
2
399