AT32UC3A1256AU Atmel Corporation, AT32UC3A1256AU Datasheet - Page 298

• Manufacturer Part Number: AT32UC3A1256AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A1256AU

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 69
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058K AVR32-01/12
25.9.16
Name:
Access Type:
Offset:
Reset value:
• RXSYN: Rx Sync Interrupt Mask
0: The Rx Sync Interrupt is disabled.
1: The Rx Sync Interrupt is enabled.
• TXSYN: Tx Sync Interrupt Mask
0: The Tx Sync Interrupt is disabled.
1: The Tx Sync Interrupt is enabled.
• CP1: Compare 1 Interrupt Mask
0: The Compare 1 Interrupt is disabled.
1: The Compare 1 Interrupt is enabled.
• CP0: Compare 0 Interrupt Mask
0: The Compare 0 Interrupt is disabled.
1: The Compare 0 Interrupt is enabled.
• RXBUFF: Receive Buffer Full Interrupt Mask
0: The Receive Buffer Full Interrupt is disabled.
1: The Receive Buffer Full Interrupt is enabled.
• ENDRX: End of Reception Interrupt Mask
0: The End of Reception Interrupt is disabled.
1: The End of Reception Interrupt is enabled.
• OVRUN: Receive Overrun Interrupt Mask
0: The Receive Overrun Interrupt is disabled.
1: The Receive Overrun Interrupt is enabled.
• RXRDY: Receive Ready Interrupt Mask
0: The Receive Ready Interrupt is disabled.
RXBUFF
31
23
15
–
–
–
7
Interrupt Mask Register
ENDRX
30
22
14
IMR
Read-only
0x4C
0x00000000
–
–
–
6
OVRUN
29
21
13
–
–
–
5
RXRDY
28
20
12
–
–
–
4
TXBUFE
RXSYN
27
19
11
–
–
3
TXSYN
ENDTX
26
18
10
–
–
2
TXEMPTY
CP1
25
17
–
–
9
1
AT32UC3A
TXRDY
CP0
24
16
–
–
8
0
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