AT32UC3A1256AU Atmel Corporation, AT32UC3A1256AU Datasheet - Page 70

• Manufacturer Part Number: AT32UC3A1256AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A1256AU

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 69
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058K AVR32-01/12
13.6.3
Name:
Access Type:
•
Table 13-5.
MASK: Clock Mask
Bit
10
11
12
13
0
1
2
3
4
5
6
7
8
9
31
23
15
7
If bit n is cleared, the clock for module n is stopped. If bit n is set, the clock for module n is enabled according to the current
power mode. The number of implemented bits in each mask register, as well as which module clock is controlled by each bit, is
shown in
Clock Mask
CPUMASK
Maskable module clocks in AT32UC3A.
OCD
Table
-
-
-
-
-
-
-
-
-
-
-
-
-
30
22
14
6
CPU/HSB/PBA/PBBMASK
Read/Write
13-5.
29
21
13
5
HSBMASK
PBA bridge
PBB bridge
FLASHC
MACB
PDCA
USBB
EBI
-
-
-
-
-
-
-
28
20
12
4
MASK[31:24]
MASK[23:16]
MASK[15:8]
MASK[7:0]
PM/RTC/EIC
PBAMASK
USART0
USART1
USART2
USART3
PDCA
GPIO
PWM
INTC
SPI0
SPI1
ADC
SSC
TWI
27
19
11
3
26
18
10
2
PBBMASK
HMATRIX
SDRAMC
FLASHC
MACB
USBB
SMC
-
-
-
-
-
-
-
-
25
17
9
1
AT32UC3A
24
16
8
0
70