TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 201

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

BROMCR
(016CH)
Bit Symbol
Read/Write
Reset State
Function
(4) Bypassing boot ROM
Note: Reset states differ depending on start modes.
even after completing the boot sequence in BOOT mode. In this case, the external memory
area from 3FE000H to 3FFFFFH can not be accessed because the boot ROM already
resides in the same area.
BROMCR<ROMLESS> bit to 1.
to 1 in other start modes.
To avoid such a situation, the on-chip boot ROM can be bypassed by setting the
This BROMCR<ROMLESS> bit is initialized to 0 in BOOT mode, while it is initialized
If this bit has been set to 1, writing a 0 to this bit is prohibited.
The application system program may continue to run without asserting a reset signal
7
6
92CF26A-199
5
4
3
Nand_Flash
area
CS output
0: Enable
1: Disable
CSDIS
2
1
Boot ROM
0: Use
1: Bypass
ROMLESS
0/1 (note)
R/W
1
TMP92CF26A
2009-06-25
Vector
address
conversion
0: Disable
1: Enable
1/0 (note)
VACE
0