TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 628
TMP92xy26AXBG
Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY26AXBG.pdf
(768 pages)
Specifications of TMP92xy26AXBG
Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
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Setting example:
1.
2.
3. Convert the analog input voltage on the AN2 pin as a Top-priority AD conversion, and write the result to memory
4. Convert the analog input voltage on the AN4 pin as a normal AD conversion of a channel-fix single conversion mode.
Main routine
INTEAD
ADMOD1
ADMOD0
Interrupt routine processing example
WA
WA
(2800H)
INTEAD
ADMOD1
ADMOD0
Main routine
INTEAD
ADMOD1
ADMOD3
ADMOD2
Interrupt routine processing example
WA
WA
(2A00H)
Main routine
INTEAD
ADMOD5
ADMOD4
ADMOD1
ADMOD0
Interrupt routine processing example
WA
WA
(2C00H)
X : Don't care, − : No change
And then if its conversion result is greater or equal than the value of (ADCM0REGL/H), write the result to memory
address 2C00H using the AD monitor function interrupt (INTADM) processing routine.
Convert the analog input voltage on the AN3 pin and write the result to memory address 2800H using the AD
interrupt(INTAD) processing routine.
This example repeatedly converts the analog input voltages on the three pins AN0, AN1 and AN2, using
channel-scan repeat conversion mode.
address 2A00H using the Top-priority AD interrupt (INTADHP) processing routine.
← 1
← 1
← X
← ADREG3
← > > 6
← WA
← 1
← 1
← X
← 1
← 1
← 0
← 0
← ADREGSP
← > > 6
← WA
← −
← 0
← 0
← 1
← 0
← ADREG4
← > > 6
← WA
7
X
X
6
1
1
0
1
1
0
0
0
−
0
0
0
0
5
0
0
0
0
0
0
0
0
1
0
−
0
1
1
0
4
0
0
0
0
0
0
1
0
0
0
−
0
0
0
0
3
−
0
0
−
0
0
−
0
0
1
1
1
0
0
1
2
−
0
0
−
0
1
−
0
0
0
0
0
0
0
0
92CF26A-626
1
−
1
0
−
1
1
−
0
0
0
1
0
0
0
0
0
−
1
1
−
0
1
−
0
0
0
1
0
0
0
0
Enable INTAD and set it to interrupt level 4.
Set pin AN3 to be the analog input channel.
Start conversion in channel-fix single conversion mode.
Read value of ADREG3L and ADREG3H into 16-bits
general-purpose register WA.
Shift contents read into WA six times to right and zero fill
upper bits.
Write contents of WA to memory address 2800H.
Disable INTAD.
Set pins AN0 to AN2 to be the analog input channels.
Start conversion in channel-scan repeat conversion mode.
Enable INTADHP and set it to interrupt level 6.
DAC On.
Set pin AN2 to be the analog input channel.
Start a Top-priority AD conversion by software.
Read value of ADREGSPL and ADREGSPH into 16-bits
general-purpose register WA.
Shift contents read into WA six times to right and zero fill
upper bits.
Write contents of WA to memory address 2A00H.
Enable INTAD and set it to interrupt level 3.
Set the analog input channel AN4 for AD monitor function 0.
Enable the AD monitor function0 and AD monitor function
interrupt 0. Set “a conversion result ≥ AD conversion result
compare criterion register” for generation condition of monitor
function interrupt 0.
Set pin AN4 to be the analog input channel.
Start a normal AD conversion by software.
Read value of ADREG4L and ADREG4H into 16-bits
general-purpose register WA.
Shift contents read into WA six times to right and zero fill
upper bits.
Write contents of WA to memory address 2C00H.
TMP92CF26A
2009-06-25
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