TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 645

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
Multiplier A
Register
Multiplier B
Register
MAC
Register
3.26.1.2 Data Registers
Note 1: After reset, all the registers are cleared to “0”.
Note 2: Read-modify-write instructions can be used on all the registers.
Note 3: All the registers can be accessed in long word, word, or byte units. (In case of using “sign mode”, it can be
Note 4: When MACCR<MSTTG2:0> is set to “0”, “001”, “010” or “011” and the registers are written in word or byte
Note 5: The MACORL register is fixed one system clock (f
Note 6: In case of using “sign mode”, MACCR<MSGMD> = 1, it must need to write to MACMA and MACMB register
Bits<63:56>
(1BEFH)
accessed in long word only)
units, the <7:0> bits of each register must be written last.
is fixed two system clocks (f
immediately after calculation, be sure to read the MACORL register first.
with longword (32bit).
The data registers are arranged as shown below.
Bits<55:48>
(1BEEH)
Bits<47:40>
(1BEDH)
SYS
) after calculation is started. Therefore, to read the MACOR register
92CF26A-641
Bits<39:32>
MACORH
(1BECH)
Data Registers
SYS
) after calculation is started, and the MACORH register
Bits<31:24>
(1BE3H)
(1BE7H)
(1BEBH)
Bits<23:16>
(1BEAH)
(1BE2H)
(1BE6H)
Bits<15:8>
(1BE1H)
(1BE5H)
(1BE9H)
TMP92CF26A
2009-06-25
Bits<7:0>
MACORL
(1BE0H)
(1BE4H)
(1BE8H)
MACMA
MACMB

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