TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 522

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

LCDPRVSP
(028EH)
LCDVSP
(028CH)
(028DH)
LCDHSP
(028AH)
(028BH)
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
LVP7
LH15
LH7
7
7
7
7
0
7
0
0
LH14
LVP6
PLV6
LCD LVSYNC Pre Pulse Register
LH6
6
6
6
6
6
0
0
0
0
LCD LHSYNC Pulse Register
LCD LVSYNC Pulse Register
92CF26A-520
LH13
LVP5
PLV5
LH5
5
5
5
5
5
0
0
0
0
LHSYNC period (bits 7–0)
LHSYNC period (bits 15-8)
LVSYNC period (bits 7-0)
Front dummy LVSYNC (bits 6-0)
LVP4
PLV4
LH12
LH4
4
4
4
4
0
4
0
0
0
W
W
W
LH11
LVP3
PLV3
LH3
W
3
3
0
0
3
3
3
0
0
LH10
LVP2
PLV2
LH2
2
2
2
2
2
0
0
0
0
LVP1
LVP9
PLV1
LH1
LH9
LVSYNC period
1
1
1
1
0
1
0
0
0
0
(bits 9-8)
TMP92CF26A
W
2009-06-25
LVP0
LVP8
PLV0
LH0
LH8
0
0
0
0
0
0
0
0
0
0