TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 405

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

COMMAND
(07D0H)
3.16.3.21 COMMAND Register
bit Symbol
Read/Write
Reset State
EP [2:0] (Bit6 to bit4)
COMMAND [3:0] (Bit3 to bit0)
Note: When writing to this register, a recovery time of 5clock at 12MHz is needed. After writing this register, insert
000: Select endpoint 0
001: Select endpoint 1
010: Select endpoint 2
011: Select endpoint 3
0000: Reserved
0001: Reserved
0010: SET_DATA0
0011: RESET
0100: STALL
0101: INVALID
0110: CREATE_SOF
0111: FIFO_DISABLE
dummy instruction of 420 ns or longer.
endpoint in bit6 to bit4 and kind of COMMAND in bit3 to bit0.
This register sets COMMAND at each endpoint. This register can be set to select of
COMMAND for endpoint that is supported is ignored.
7
EP[2]
W
6
0
If this COMMAND is input, it sets toggle sequence bit of the corresponding endpoint to
“0”. Data toggle for transfer is renewed automatically by UDC. However, this
COMMAND execution is required if setting toggle sequence bit of endpoint to “0”.If
control transfer type and Isochronous transfer type, execution of this COMMAND is not
required because of hardware control.
This COMMAND resets the corresponding endpoint (EP0 to EP3).
If this COMMAND is input, the corresponding endpoint is initialized. CLEAR_FEATURE
request stalls endpoint. When this stall is cleared, execute this COMMAND. (This
command does not affect transfer mode.)
This command initializes the following.
・Clear toggle sequence bit of corresponding endpoint.
・Clear STALL of corresponding endpoint.
・Set to FIFO_ENABLE condition.
・Clear the data in FIFO
If STALL handshake must be return as answer for device request, execute this
command.
EP3).
If UDC detects USB_RESET signal from USB host, it sets all endpoints (except
endpoint 0) to prohibition using it automatically. If Config and Interface are changed by
device request, set endpoint that is not used to prohibit use.
Default is set to disable, it must be used for Isochronous transfer.
This COMMAND clear toggle sequence bit of corresponding endpoint (EP0 to EP3).
This COMMAND sets corresponding endpoint to STALL (EP0 to EP3).
This COMMAND sets condition to prohibition of use corresponding endpoint (EP1 to
This COMMAND sets quasi-SOF generation function to enable (EP0).
This COMMAND sets FIFO of corresponding endpoint to disable (EP1 to EP3).
If this command is set from external, all of transfers except for toggle error for
corresponding endpoint return NAK. When it is set externally while receiving packet,
this becomes valid from next token. This command does not affect the packet that is
transferring.
92CF26A-403
EP[1]
W
5
0
EP[0]
W
4
0
Command[3]
W
3
0
Command[2]
W
2
0
Command[1]
TMP92CF26A
W
1
0
2009-06-25
Command[0]
W
0
0