TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 679

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

(at SPIMD<TCPOL,RCPOL> = “00”)
(at SPIMD<TCPOL,RCPOL> = “11”)
AC measuring condition
•Clock of top column in above table shows system clock frequency, and “S” in “Variable” show SPCLK
clock cycle [ns].
• C
SPDI Input
SPCLK frequency ( = 1/S)
SPCLK rising time
SPCLK falling time
SPCLK low width
SPCLK high width
Output data valid
SPCLK rising/ falling
Input data valid
SPCLK rising/ falling
SPDO Output
4.3.11
L
= 25 pF
SPCLK Output
SPCLK Output
Parameter
→ SPCLK rising/ falling
→ SPCLK rising/falling
SPI Controller
→ Output data hold
→ Input data valid
Symbol
t
r
0.7 V
t
t
t
t
t
t
ODH
f
ODS
WH
IDS
IDH
0.2V
WL
PP
t
t
r
f
CC
CC
f
PP
t
f
0.5S − 18
0.5S − 10
0.5S − 6
0.5S − 6
Min
5
5
92CF26A-677
Variable
Max
t
20
WL
6
6
t
t
ODS
IDS
t
WH
t
80 MHz 60 MHz
ODH
t
IDH
20
19
19
15
6
6
7
5
5
23.4
15
28
28
15
6
6
5
5
Unit
MHz
ns
TMP92CF26A
2009-06-25