S1D13704 Epson Electronics America, Inc., S1D13704 Datasheet - Page 306

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S1D13704

Manufacturer Part Number
S1D13704
Description
LCD Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Page 10
S1D13704
X26A-G-014-02
SW1-[3:1]
Switch
SW1-4
SW1-5
SW1-6
S1D13704
= Required settings when used with PCI Bridge FPGA
CNF[2:0]
Signal
GPIO0
CNF3
CNF4
Note
The S1D13704 has 5 configuration inputs (CONF[4:0]) and BS# input, which are read on
the rising edge of RESET#. All S1D13704 configuration inputs and BS# input are fully
configurable using a six position DIP switch as described below and a jumper for BS#.
Select host bus interface as follows:
Note: The host bus interface is 16-bit.
Big Endian bus interface
Active High LCDPWR signal
Hardware Suspend Enable
1
The selection between Generic #1 and Generic #2 is made with JP3.
Table 3-1: Configuration DIP Switch Settings
CNF2
Value on this pin at rising edge of RESET# is used to configure:
0
0
0
0
1
1
1
1
Open (Off/1)
CNF1
0
0
1
1
0
0
1
1
CNF0
0
1
0
1
0
1
0
1
S5U13704B00C Rev. 2.0 Evaluation Board User Manual
Little Endian bus interface
Active Low LCDPWR signal
Hardware Suspend Disable
Host Bus Interface
SH-4
SH-3
Reserved
MC68K #1
Reserved
MC68K #2
Reserved
Generic #1/Generic #2
Epson Research and Development
Closed (On/0)
1
Vancouver Design Center
Issue Date: 2002/09/16

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