S1D13704 Epson Electronics America, Inc., S1D13704 Datasheet - Page 68
S1D13704
Manufacturer Part Number
S1D13704
Description
LCD Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13704.pdf
(492 pages)
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bit 7
bits 5-0
.
bits 5-0
REG[0Dh] bit 6-0
REG[0Ch] bit 7-0
REG[0Dh] bit 7
S1D13704
X26A-A-001-06
REG[0Ah] Vertical Non-Display Period
Address = FFEAh
REG[0Bh] MOD Rate Register
Address = FFEBh
REG[0Ch] Screen 1 Start Address Register (LSB)
Address = FFECh
Screen 1 Start
REG[0Dh] Screen 1 Start Address Register (MSB)
Address = FFEDh
Screen 1 Start
Vertical Non-
Address
Address
Display
Status
Bit 15
Bit 7
n/a
Screen 1 Start
Screen 1 Start
Address
Address
Bit 14
Bit 6
n/a
n/a
Note
Vertical Non-Display Status
This bit =1 during the Vertical Non-Display period.
Vertical Non-Display Period
These bits specify the vertical non-display period.
MOD Rate Bits [5:0]
When the value of this register is 0, the MOD output signal toggles every FPFRAME. For
a non-zero value, the value in this register + 1 specifies the number of FPLINEs between
toggles of the MOD output signal. These bits are for passive LCD panels only.
byte address of the start of Screen 1 in SwivelView modes.
This bit is for SwivelView mode only and has no effect in Landscape mode.
Screen 1 Start Address Bits [14:0]
These bits determine the word address of the start of Screen 1 in landscape modes or the
Screen 1 Start Address Bit 15
This register should be set only once, on power-up during initialization.
Screen 1 Start
Screen 1 Start
Vertical Non-
VerticalNonDisplayPeriod lines
Period Bit 5
MOD Rate
Address
Address
Display
Bit 13
Bit 5
Bit 5
Screen 1 Start
Screen 1 Start
Vertical Non-
Period Bit 4
MOD Rate
Address
Address
Display
Bit 12
Bit 4
Bit 4
Screen 1 Start
Screen 1 Start
Vertical Non-
Period Bit 3
MOD Rate
Address
Address
Display
=
Bit 11
Bit 3
Bit 3
REG 0Ah Bits 5:0
Screen 1 Start
Screen 1 Start
Vertical Non-
Period Bit 2
MOD Rate
Display
Address
Address
Bit 10
Bit 2
Bit 2
Epson Research and Development
Screen 1 Start
Screen 1 Start
Hardware Functional Specification
Vertical Non-
Period Bit 1
MOD Rate
Address
Address
Display
Bit 1
Bit 1
Bit 9
Vancouver Design Center
Issue Date: 02/02/01
Screen 1 Start
Screen 1 Start
Read/Write
Vertical Non-
Read/Write
Read/Write
Read/Write
Period Bit 0
MOD Rate
Display
Address
Address
Bit 0
Bit 0
Bit 8
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