S1D13704 Epson Electronics America, Inc., S1D13704 Datasheet - Page 46
S1D13704
Manufacturer Part Number
S1D13704
Description
LCD Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13704.pdf
(492 pages)
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7.3.4 Single Monochrome 8-Bit Panel Timing
VDP =
VNDP =
HDP =
HNDP =
S1D13704
X26A-A-001-06
DRDY (MOD)
DRDY (MOD)
FPDAT[7:0]
* Diagram drawn with 2 FPLINE vertical blank period
Example timing for a 640x480 panel
For this timing diagram Mask FPSHIFT, REG[01h] bit 3, is set to 1
FPFRAME
Vertical Display Period
Vertical Non-Display Period
Horizontal Display Period
Horizontal Non-Display Period
FPDAT7
FPDAT6
FPDAT5
FPDAT4
FPDAT3
FPDAT2
FPDAT1
FPDAT0
FPLINE
FPLINE
FPSHIFT
Figure 7-13: Single Monochrome 8-Bit Panel Timing
1-1
1-2
1-3
1-4
1-5
1-6
1-7
1-8
LINE1
1-10
1-13
1-14
1-15
1-11
1-12
1-16
1-9
LINE2
= (REG[06h] bits 1-0, REG[05h] bits 7-0) + 1 Lines
= REG[0Ah] bits 5-0 Lines
= ((REG[04h] bits 6-0) + 1) x 8Ts
= (REG[08h] + 4) x 8Ts
LINE3
LINE4
VDP
HDP
LINE479 LINE480
VNDP
1-633
1-634
1-635
1-636
1-637
1-638
1-639
1-640
Epson Research and Development
Hardware Functional Specification
HNDP
LINE1
Vancouver Design Center
Issue Date: 02/02/01
LINE2
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