S1D13704 Epson Electronics America, Inc., S1D13704 Datasheet - Page 77
S1D13704
Manufacturer Part Number
S1D13704
Description
LCD Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13704.pdf
(492 pages)
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Epson Research and Development
Vancouver Design Center
9 Frame Rate Calculation
Hardware Functional Specification
Issue Date: 02/02/01
The following formulae are used to calculate the display frame rate.
TFT/D-TFD and Passive Single-Panel modes
Where: f
Passive Dual-Panel mode
Where:
HDP
HNDP = Horizontal Non-Display Period = ((REG[08h] bits 4-0) + 4) x 8 Pixels
VDP
VNDP = Vertical Non-Display Period = (REG[0Ah] bits 5-0) Lines
FrameRate
PCLK
f
HDP
HNDP = Horizontal Non-Display Period = ((REG[08h] bits 4-0) + 4) x 8 Pixels
VDP
VNDP = Vertical Non-Display Period = (REG[0Ah] bits 5-0) Lines
FrameRate
PCLK
= PClk frequency (Hz)
= Horizontal Display Period = ((REG[04h] bits 6-0) + 1) x 8 Pixels
= Vertical Display Period = ((REG[06h] bits 1-0, REG[05h] bits 7-0) + 1) Lines
= PClk frequency (Hz)
= Horizontal Display Period = ((REG[04h] bits 6-0) + 1) x 8 Pixels
= Vertical Display Period = ((REG[06h] bits 1-0, REG[05h] bits 7-0) + 1) Lines
=
=
-------------------------------------------------------------------------------------------------- -
2
---------------------------------------------------------------------------------------- -
HDP
HDP
+
+
HNDP
HNDP
f
f
PCLK
PCLK
VDP
VDP
----------- -
2
+
+
VNDP
VNDP
X26A-A-001-06
S1D13704
Page 71
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