S1D13704 Epson Electronics America, Inc., S1D13704 Datasheet - Page 398

• Manufacturer Part Number: S1D13704
• Description: LCD Controller
• Manufacturer: Epson Electronics America, Inc.

Page 12
4 PC Card to S1D13704 Interface
4.1 Hardware Connections
S1D13704
X26A-G-009-03
PC Card socket
RESET
D[15:0]
A[15:0]
WAIT#
REG#
CE1#
CE2#
Figure 4-1: Typical Implementation of PC Card to S1D13704 Interface
WE#
OE#
The S1D13704 is interfaced to the PC Card interface with a minimal amount of glue logic.
A PAL is used to decode the write and read signals of the PC Card bus to generate RD#,
RD/WR#, WE0#, WE1#, and CS# for the S1D13704. The PAL also inverts the reset signal
of the PC card since it is active high and the S1D13704 uses an active low reset. For PAL
equations for this implementation refer to Section 4.3, “PAL Equations” on page 14.
In this implementation, the address inputs (AB[15:0]) and data bus (DB[15:0] connect
directly to the CPU address (A[15:0]) and data bus (D[15:0]).
The PC Card interface does not provide a bus clock, so one must be supplied for the
S1D13704. Since the bus clock frequency is not critical, nor does it have to be synchronous
to the bus signals, it may be the same as CLKI.
BS# (bus start) is not used by Generic #1 mode but is used to configure the S1D13704 for
Generic #1 and should be tied low (connected to GND).
The following diagram shows a typical implementation of the PC Card to S1D13704
interface.
15K pull-up
PAL16L8-15
Oscillator
Epson Research and Development
CS#
RESET#
AB[15:0]
DB[15:0]
WAIT#
CLKI
RD#
RD/WR#
WE0#
WE1#
BUSCLK
Interfacing to the PC Card Bus
S1D13704
Vancouver Design Center
Issue Date: 01/02/12