S1D13704 Epson Electronics America, Inc., S1D13704 Datasheet - Page 315

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S1D13704

Manufacturer Part Number
S1D13704
Description
LCD Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Epson Research and Development
Vancouver Design Center
6 Technical Description
6.1 PCI Bus Support
6.2 Direct Host Bus Interface Support
6.3 S1D13704 Embedded Memory
6.4 Adjustable LCD Panel Positive Power Supply (VDDH)
S5U13704B00C Rev. 2.0 Evaluation Board User Manual
Issue Date: 2002/09/16
Note
The S1D13704 does not have on-chip PCI bus interface support. The S1D13704B00C uses
the PCI Bridge FPGA to support the PCI bus. When using the PCI Bridge FPGA, a
Windows device driver is required, see Section 7, “Software” on page 22 for further infor-
mation on available software and drivers.
The S5U13704B00C is specifically designed to work using the PCI Bridge FPGA in a
standard PCI bus environment. However, the S1D13704 directly supports many other host
bus interfaces. Connectors H1 and H2 provide the necessary IO pins to interface to these
host buses. For further information on the host bus interfaces supported, see “CPU
Interface” on page 15.
The S1D13704 has 40K bytes of embedded SRAM. The 40K byte display buffer address
space is directly and contiguously available through the 16-bit address bus.
The S1D13704 registers are located in the upper 32 bytes of the 64K byte address range of
S1D13704.
For those LCD panels requiring a positive power supply to provide between +23V and
+40V (Iout = 45mA) a power supply has been provided as an integral part of this design.
The VDDH power supply can be adjusted by R15 to provide an output voltage from +23V
to +40V and is enabled and disabled by the active high LCDPWR control signal of
S1D13704 and inverted externally.
Determine the panel’s specific power requirements and set the potentiometer accordingly
before connecting the panel.
The PCI Bridge FPGA must be disabled using JP5 in order for direct host bus interface
to operate properly.
X26A-G-014-02
S1D13704
Page 19

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