S1D13704 Epson Electronics America, Inc., S1D13704 Datasheet - Page 419

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S1D13704

Manufacturer Part Number
S1D13704
Description
LCD Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Epson Research and Development
Vancouver Design Center
4 MPC821 to S1D13704 Interface
4.1 Hardware Description
Interfacing to the Motorola MPC821 Microprocessor
Issue Date: 01/02/12
Figure 4-1: Typical Implementation of MPC821 to S1D13704 Interface
The interface between the S1D13704 and the MPC821 requires minimal glue logic. One
inverter is required to change the polarity of the WAIT# signal (an active low signal) to
insert wait states in the bus cycle. The MPC821 Transfer Acknowledge signal (TA) is an
active low signal which ends the current bus cycle. The inverter is enabled using CS# so
that TA is not driven by the S1D13704 during non-S1D13704 bus cycles. A single resistor
is used to speed up the rise time of the WAIT# (TA) signal when terminating the bus cycle.
BS# (bus start) is not used in this implementation and should be tied low (connected to
GND).
The following diagram shows a typical implementation of the MPC821 to S1D13704
interface.
MPC821
A[16:31]
SYSCLK
D[0:15]
RESET
TA
WE0
WE1
CS4
OE
Vcc
470
BUSCLK
RESET#
RD/WR#
S1D13704
AB15-AB0
RD#
WAIT#
WE1#
DB[15:D0]
CS#
WE0#
X26A-G-010-03
S1D13704
Page 15

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