PM5364 pmc-sierra, PM5364 Datasheet - Page 100
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PM5364
Manufacturer Part Number
PM5364
Description
Tupp 2488 Assp Telecom Standard
Manufacturer
pmc-sierra
Datasheet
1.PM5364.pdf
(306 pages)
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Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
8 x CONC_INV_POINT: 8 consecutive INV_POINT indications
Notes
1.
2.
The concatenation pointer interpreter state machine detects path loss of pointer concatenation
(LOPC-P) defects, path concatenation alarm indication signal (AISC-P) defects, and all path
concatenation alarm indication signal (ALLAISC-P) defects. A LOPC-P defect is declared when
any of the concatenation pointer interpreter state machine, processing the same concatenated
payload, enters the LOPC_state. A LOPC-P defect is removed when all the concatenation
pointer interpreter state machine, processing the same concatenated payload, exits the
LOPC_state. An AISC-P defect is declared when any of the concatenation pointer interpreter
state machine, processing the same concatenated payload, enters the AISC_state. An AISC-P
defect is removed when all the concatenation pointer interpreter state machine, processing the
same concatenated payload, exits the AISC_state. An ALLAISC-P defect is declared when all
the concatenation pointer interpreter state machine, processing the same concatenated payload,
enters the AISC_state. An ALLAISC-P defect is removed when any of the concatenation pointer
interpreter state machine, processing the same concatenated payload, exits the AISC_state.
Error Monitoring
The RHPP_R calculates the path BIP-8 error detection codes on the STS-1/3c/12c/48c
(VC-3/4/4-4c/4-16c) payloads. When processing a VC-3 payload, the two fixed stuff columns
can be excluded of the BIP-8 calculation if the FSBIPDIS register bit is set. The path BIP-8
code is based on a bit interleaved parity calculation using even parity. The calculated BIP-8
codes are compared with the BIP-8 codes extracted from the B3 byte of each constituent STS
(VC) payload of the following frame. Any differences indicate a path BIP-8 error. The
RHPP_R accumulates path BIP-8 errors in a microprocessor readable 16 bits saturating counter
(up to 1 second accumulation time). Optionally, block BIP-8 errors can be accumulated.
The RHPP_R extracts the path remote error indication (REI-P) errors from bits 1, 2, 3 and 4 of
the path status byte (G1) and accumulates them in a microprocessor readable 16 bits saturating
counter (up to 1 second accumulation time). Optionally, block block REI errors can be
accumulated.
The RHPP_R monitors the path signal label byte (C2) payload to validate change in the
accepted path signal label (APSL). The same PSL byte must be received for three or five
consecutive frames (selectable by the PSL5 bit in the configuration register) before being
considered accepted.
"Consecutive event counters" are reset to zero on a change of state.
The number of “consecutive AIS indications” required to transition to the AIS state is programmable
with the RELAYAIS register bit (1 or 3).
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
Released
100
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