PM5364 pmc-sierra, PM5364 Datasheet - Page 194

• Manufacturer Part Number: PM5364
• Description: Tupp 2488 Assp Telecom Standard
• Manufacturer: pmc-sierra

13.7
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
Tributary Bit Error Rate Monitoring (TBER) Features
The TBER power-up default operation mode is the TU11/VT1.5. The TBER is configured
through indirect address registers. For a write operation, the data is first written to the indirect
data registers. The address along with the write command bit is written to the indirect address
register thus initiating the write operation. For a read operation, only the address along with the
read command bit is written to the indirect address register. The requested data is returned in
the indirect data registers. In both cases, when memory access has completed, the busy bit in
the indirect address register is cleared. The Busy bit will never stay high more than 25 clock
cycles, and will usually be high for ~10 clock cycles.
The Tributary Bit Error Rate Monitor (TBER) block counts and monitors BIP-2 errors over
programmable periods of time (window size). It can monitor to declare an alarm or to clear it if
the alarm is already set. Table 36 lists the recommended contents of the Lookup Table registers
for different VT levels (VT1.5, VT2, VT3 and VT6, and their TU-equivalents) and for different
BER monitoring levels for both declaration and removal. The individual Tributaries can be
programmed to individually monitor any BER between 10-3 to 10-12.
These values must be written to the Lookup Table RAM. The Declaration Period and
Declaration Threshold settings should be written to IP[35:0] and ERROR_THR[4:0],
respectively with SET_CLEAR = 0. Meanwhile, the Removal Period and Removal Threshold
settings should be written to IP[35:0] and ERROR_THR[4:0], respectively with SET_CLEAR =
1.
The recommended method for cleanly reconfiguring a path can be summarized as follows:
1. Disable the path.
2. Clear the interrupt status corresponding to this path in indirect register 03H: TBER Indirect
3. Program all fields for this path in indirect registers: 01H: (TU RAM Access) and 01H to
4. Re-enable the path.
The recommended method for simply disabling a path is to perform steps #1 – 2 only from the
list above. If the path is to be re-enabled later, then steps #3 – 4 can be performed.
Data #3 (TU RAM Access).
03H (LOOKUP TABLE RAM Access). The values to use for these registers depend on the
type of BER test, the traffic concatenation level and the error rate which is to be monitored.
Refer to settings listed in Table 36 for recommended values.
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
Released
194