PM5364 pmc-sierra, PM5364 Datasheet - Page 226
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PM5364
Manufacturer Part Number
PM5364
Description
Tupp 2488 Assp Telecom Standard
Manufacturer
pmc-sierra
Datasheet
1.PM5364.pdf
(306 pages)
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Part Number:
PM5364-BI
Manufacturer:
PMC
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13.13 RASIO™ CML Reset Sequence
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
The reset strategy implemented in the SERDES complicates the CML reset sequence somewhat.
Table 42 shows the CML major functional blocks and Table 43 shows the register bits that are
used to reset the functional blocks. A suggested reset sequence of the CML subsystems only is
also presented as follows.
Table 42 CML Functional Blocks
Table 43 CML Reset Register Bits
Functional Blocks
SERDES
Line Side CML
System Side CML
RX Slice
TX Slice
Register Bit
SRSET or
RSTB (PIN)
LSCML_RST
SSCML_RST
SS_SERDES_RST
SS_CSU_RST
LS_SERDES_RST
LS_CSU_RST
Lx_RX_SLICE_RESET
(x=1,2)
Lx_TX_SLICE_RESET
(x=1,2)
Lx_PIPM_RESET
(x=1,2)
Number of Bits
1
1
1
1
1
1
1
4 (line side)
8 (system side)
4 (line side)
8 (system side)
4 (line side)
8 (system side)
Components
PISO_3330, TXCML_3330, RA013_DCRU, RX_3330 and
RA013_CSU
4 RX Slices, 4 TX Slices, one CSU Interface, 4 CML RX Slice and TX
Slice Registers
8 RX Slices, 8 TX Slices, one CSU Interface, 8 CML RX Slice and TX
Slice Registers
RSEF, PIPM, RILC (system side only), Align FIFO, TIM FIFO, TCB
Decoder and DMUX FIFO (line side slice#1 only)
TSEC, TILC (system side only), TIM FIFO, TCB ENCODER and
MUX FIFO (line side slice#1 only)
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
Reset Level
Device
Line Side CML
System Side CML
System side SERDES block (excluding
RA013_CSU).
System side RA013_CSU
Line side SERDES blocks (excluding
RA013_CSU).
line side RA013_CSU
RX Slice
TX Slice
PIPM
Released
226
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