PM5364 pmc-sierra, PM5364 Datasheet - Page 174

• Manufacturer Part Number: PM5364
• Description: Tupp 2488 Assp Telecom Standard
• Manufacturer: pmc-sierra

13.6
13.6.1
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
In addition to device latencies, there are other sources of delay. Furthermore, these delays may
vary from link to link. For example, clock skew or differential trace lengths impose uneven
delays on individual links. The 36-word depth of the FIFOs allows these delays to be equalized
as part of the re-framing process. When the RJ0FP-RJ0DLY trigger signals the occurrence of a
frame boundary, the Line Serial/CML will read the J0 character from address 0 of the FIFO, the
position into which the J0 character is always written. As long as the J0 characters from all the
STS-12 streams are indeed simultaneously present in their respective FIFOs when this occurs,
the Serial/CML will effectively re-align the streams as part of the re-framing process. The large
FIFO depth allows the Serial/CML to compensate for such differential delays as trace lengths
that vary by several meters. Smaller delay variances, such as those due to clock jitter, need to be
included in the FIFO depth budget. The effective FIFO depth is 31 bytes as the FIFO will report
an error if the read and write pointers are too close. Therefore, the FIFOs can accommodate a
total delay variance of 398ns between the arrival time of J0 characters on different links.
The number of clock cycles can be determined by simply adding the relevant device and cable
length latencies or by reading the distance values reported by the FIFOs and adjusting the
REF_DLY values appropriately. This synchronization mechanism is flexible enough to
accommodate system paths with different cumulative device latencies.
Payload Processing Subsystem Operation
The Payload Processor Subsystem contains two paths: Tributary Path and Bypass Path. Each
path supports a selection of modes of operation. When a mix of traffic is present both Tributary
and Bypass Paths may be used. Both paths will receive all types of traffic, but only the correct
path for that type of traffic will produce valid output data. The valid output data from the two
paths is multiplexed together at the output of the Payload Processor in the Tributary-Bypass
Mux.
Tributary Path
The Tributary path is used to process tributary traffic. The Tributary Path can process any legal
mix of tributaries. The frame configuration must be predetermined and the Payload Processor
top level registers and constituent functional blocks configured to be consistent with this frame
configuration. The Tributary path performs tributary extraction, trail trace processing, tributary
overhead processing serial alarm extraction and arbitrary C1/J0 alignment. High order
justifications are translated to low order justifications, which ensures that outgoing tributaries
are always in the same outgoing frame column as they came in.
For normal operation the incoming and outgoing frame configurations are the same. Legal
frame configurations can be summarized as:
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AU3/VC3/TUG2
AU4/VC4/TUG3/TUG2
AU4/VC4/TUG3/TU3/VC3
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
Released
174