PM5364 pmc-sierra, PM5364 Datasheet - Page 197
![no-image](/images/no-image-200.jpg)
PM5364
Manufacturer Part Number
PM5364
Description
Tupp 2488 Assp Telecom Standard
Manufacturer
pmc-sierra
Datasheet
1.PM5364.pdf
(306 pages)
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Part Number:
PM5364-BI
Manufacturer:
PMC
Quantity:
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13.8.2
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
A reference pulse (EJ0) is generated externally and fed to each switch in a fabric. Each switch
has a delay register which contains the count of 77.76 MHz clock ticks that device should delay
from the reference timing pulse before expecting the J0 characters of the egress STS-12 frames
to have arrived. The base timing pulse is called t
delay registers in the successive columns of the devices are called t
t
load devices (column 0) to start emitting an STS-12 frame (with its special “J0” control
character) at that time. t
approximately the earliest time that all “J0” characters will have arrived in the egress FIFOs of
the t
at the i
12 frames. The egress FIFOs permit a variable latency in J0 arrival of up to 16 clock cycles.
Figure 40 “J0” Synchronization Control
Synchronized Control Setting Changes For CCB and MSU
The Wideband Switches support dual switch control settings. These dual settings permit one
bank of settings to be operational while the other bank is updated as a result of some new
connection requests. The CMP inputs select the current operational switch control settings.
CMP is sampled by TUPP 2488 on EJ0. The internal blocks sample the registered CMP value as
they receive the next J0 character –after a delay defined by software.
The new CMP value is applied on the first A1 character of the following STS-12 frame. This
switchover is hitless; the control change does not disrupt the user data flow in any way. This
feature is required for the addition of arbitrary new connections, as existing connections may
need to be rerouted (see the discussion of the connection routing algorithm in this document).
The Column granularity switch settings RAM in organized into two control setting banks, these
are switched by the above mechanisms on frame boundaries.
1
(equal to t
i
column of devices. t
t
th
0
column. The i
0
), determines the start of an STS-12 frame; this signal is used to instruct the egress
Ingress
path
t at 0µs
t
0
,
t
1
th
delay
i
t
column of devices use the t
1
is determined by the customer, based on device and wiring delays to be
i
is selected to provide assurance that all “J0” characters have arrived
1 row delay
Ing. MSU
delay
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
t
2
reference J0
.
t
2
The delays from t based on the settings of the
CCB
t
i
3
signal to synchronize emission of the STS-
delay
t
3
1 row delay
Eg. MSU
0
, … t
4
. The first signal,
t
4
delay
t
4
Egress
path
Released
197
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