PM5364 pmc-sierra, PM5364 Datasheet - Page 88

• Manufacturer Part Number: PM5364
• Description: Tupp 2488 Assp Telecom Standard
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
The RILC block receives software messages across the system side RASIO™ CML links. The
inband communication channels across system side RASIO™ CML links allow for centralized
control and configuration when operating with a centralized fabric which is on a different board
(e.g. external NSE family device), or when the internal crossbar is being used in a TUPP 2488
device with external SBS devices on a different board. The inband channel is full duplex. When
an external NSE is used, the external NSE has active control of the link. When the internal
crossbar is used, the TUPP 2488 has active control of the link.
Incoming messages are held in a FIFO in the RILC capable of holding eight messages each.
Messages are read from the FIFO via the microprocessor interface. Message header bits are read
through microprocessor-accessible registers. Interrupts may be generated based on status change
of some received header bits. The status of message reception is reported via registers indicating
the number of received messages. Interrupts can also be generated for message reception based
on received message thresholds and also based upon timeout of received messages.
Interrupts can be generated by the RILC when the USER or LINK bits change state. There is no
inherent flow control provided by the ILC blocks. The attached microprocessor is able to
provide flow control via interrupts when the RILC inband message FIFO overflows and via the
USER and Auxiliary bits in the header.
As each message arrives into the RILC, the CRC-16 and valid bit is checked; if the valid bit is
not set the message is ignored and discarded, if it fails the CRC-16 check it is flagged as being
in error. If the CRC-16 is OK, regardless of the valid bit, the Page, Link, User and Aux bits are
passed on immediately. If the RILC FIFO erroneously overflows, an interrupt is generated.
Inband Channel
The inband channel is carried in the first 36 columns of four rows of the TelecomBus structure,
rows 3, 6, 7, and 8. The overall inband channel capacity is thus 36*4*64 Kbit/s = 9.216 Mbit/s.
Each 36 bytes per row allocated to the inband signaling channel is its own inband message
between the end points. Four bytes of each 36-byte inband message are reserved for end-to-end
control information and error protection, leaving 8.192 Mbit/s available for user data transfer
between the end points.
The data transferred between the end points has no fixed format, effectively providing a clear
channel for packet transfer between the attached microprocessors at each of the CML link
terminating devices. Using the microprocessor interface, the user is able to send and receive any
packet. Packets can be any size and any format packets are nominally up to 32 bytes in length.
The first two bytes of each 36-byte message contain a header and the last two bytes of the
message is a CRC-16 which detects errors in the message.
The inband channel may be used to carry out switching control changes in the internal
MSU-Lite blocks in TUPP 2488 or the external SBS devices.
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
Released
88