XC2VP70 Xilinx, Inc., XC2VP70 Datasheet - Page 69

• Manufacturer Part Number: XC2VP70
• Description: Virtex-ii Pro Field Programmable Gate Array
• Manufacturer: Xilinx, Inc.

Virtex-II Pro Switching Characteristics
Virtex-II Pro Switching Characteristics
Switching
per-speed-grade basis and can be designated as Advance,
Preliminary, or Production. Note that
mance Characteristics
well. Each designation is defined as follows:
Advance: These speed files are based on simulations only
and are typically available soon after device design specifi-
cations are frozen. Although speed grades with this desig-
nation are considered relatively stable and conservative,
some under-reporting might still occur.
Preliminary: These speed files are based on complete ES
(engineering sample) silicon characterization. Devices and
speed grades with this designation are intended to give a
better indication of the expected performance of production
silicon. The probability of under-reporting delays is greatly
reduced as compared to Advance data.
Production: These speed files are released once enough
production silicon of a particular device family member has
been characterized to provide full correlation between
speed files and devices over numerous production lots.
There is no under-reporting of delays, and customers
receive formal notification of any subsequent changes. Typ-
ically, the slowest speed grades transition to Production
before faster speed grades.
Since individual family members are produced at different
times, the migration from one category to another depends
completely on the status of the fabrication process for each
device.
Virtex-II Pro device with a corresponding speed file desig-
nation.
PowerPC Switching Characteristics
Table 15: Processor Clocks Absolute AC Characteristics
12
Notes:
1. The theoretical maximum frequency of this clock is one-half the CPMC405CLOCK. However, the achievable maximum is dependent
2. The theoretical maximum frequency of these clocks is equal to the CPMC405CLOCK. However, the achievable maximum is
CPMC405CLOCK frequency
JTAGC405TCK frequency
PLBCLK
BRAMDSOCMCLK
BRAMISOCMCLK
on the system, and will be much less.
dependent on the system. Please see
Table 14
(2)
characteristics
Description
correlates the current status of each
(2)
(2)
are subject to these guidelines, as
(1)
are
specified
PowerPC 405 Processor Block Reference Guide
Virtex-II Pro Perfor-
Min
0
0
0
0
0
on
www.xilinx.com
1-800-255-7778
-7
a
Max
400
200
400
400
400
All specifications are always representative of worst-case
supply voltage and junction temperature conditions.
Table 14: Virtex-II Pro Device Speed Grade
Designations
Testing of Switching Characteristics
All devices are 100% functionally tested. Internal timing
parameters are derived from measuring internal test pat-
terns. Listed below are representative values. For more
specific, more precise, and worst-case guaranteed data,
use the values reported by the static timing analyzer (TRCE
in the Xilinx Development System) and back-annotate to the
simulation net list. Unless otherwise noted, values apply to
all Virtex-II Pro devices.
XC2VP2
XC2VP4
XC2VP7
XC2VP20
XC2VP30
XC2VP40
XC2VP50
XC2VP70
XC2VP100
XC2VP125
Device
Min
Speed Grade
0
0
0
0
0
-6
Advance
-7, -6, -5
-7, -6, -5
Max
350
175
350
350
350
-7
-7
-7
-7
-7
-7
and
Speed Grade Designations
DS083-3 (v2.12) November 11, 2003
XAPP640
Advance Product Specification
Min
Preliminary
0
0
0
0
0
for more information.
-5
Max
300
150
300
300
300
Production
-6, -5
-6, -5
-6, -5
-6, -5
-6, -5
-6, -5
Units
MHz
MHz
MHz
MHz
MHz
R