ep2a40b724i8 Altera Corporation, ep2a40b724i8 Datasheet - Page 33

• Manufacturer Part Number: ep2a40b724i8
• Description: Programmable Logic Device Family
• Manufacturer: Altera Corporation

Altera Corporation
Figure 20. ESB in Single-Port Mode
Note to
(1)
address[ ]
outclken
outclock
inclken
inclock
data[ ]
wren
Dedicated Clocks
All registers can be asynchronously cleared by ESB local interconnect signals, global signals, or chip-wide reset.
Figure
8
Dedicated Fast
Global Signals
20:
4
In addition to the input/output mode clocking scheme, the clock
connections to the various ESB input/output registers are customizable in
the MegaWizard
Single-Port Mode
The APEX II ESB also supports a single-port mode, which is used when
simultaneous reads and writes are not required. See
ESB can support up to two single-port mode RAMs.
D
ENA
D
ENA
Note (1)
Q
Q
®
Plug-In Manager.
D
ENA
APEX II Programmable Logic Device Family Data Sheet
Generator
Pulse
Write
Q
Data In
Address
Write Enable
RAM/ROM
1,024
2,048
4,096
Data Out
256
512
16
8
4
2
1
D
ENA
Figure
Q
20. A single
To FastTrack
Interconnect
33