ep2a40b724i8 Altera Corporation, ep2a40b724i8 Datasheet - Page 35

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ep2a40b724i8

Manufacturer Part Number
ep2a40b724i8
Description
Programmable Logic Device Family
Manufacturer
Altera Corporation
Datasheet

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CAM can generate outputs in three different modes: single-match mode,
multiple-match mode, and fast multiple-match mode. In each mode, the
ESB outputs the matched data’s location as an encoded or unencoded
address. When encoded, the ESB outputs an encoded address of the data’s
location. For instance, if the data is located in address 12, the ESB output
is 12. When unencoded, each ESB port uses its 16 outputs to show the
location of the data over two clock cycles. In this case, if the data is located
in address 12, the 12th output line goes high.
encoded CAM outputs and unencoded CAM outputs, respectively.
Figure 22. Encoded CAM Address Outputs
Figure 23. Unencoded CAM Address Outputs
Notes to
(1)
(2)
In single-match mode, it takes two clock cycles to write into CAM, but
only one clock cycle to read from CAM. In this mode, both encoded and
unencoded outputs are available without external logic. Single-match
mode is better suited for designs without duplicate data in the memory.
data[30..0] =45 (1)
select (2)
data[31..0] = 45
For an unencoded output, the ESB only supports 31 input data bits. One input bit
is used by the select line to choose one of the two banks of 16 outputs.
If the select input is a 1, then CAM outputs odd words between 1 through 15. If
the select input is a 0, CAM outputs even words between 0 through 14.
Figures 22
and 23:
APEX II Programmable Logic Device Family Data Sheet
CAM
CAM
Data
Data
15
27
45
85
15
27
45
85
Address
Address
10
11
12
13
10
11
12
13
addr[15..0] = 12
match = 1
q12
q13
q14
q15
q0
Figures 21
Encoded Output
and
Unencoded outputs.
q12 goes high to
signify a match.
22
show the
35

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