ep2a40b724i8 Altera Corporation, ep2a40b724i8 Datasheet - Page 59

• Manufacturer Part Number: ep2a40b724i8
• Description: Programmable Logic Device Family
• Manufacturer: Altera Corporation

Altera Corporation
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
Power
Sequencing &
Hot Socketing
V
Table 14. APEX II MultiVolt I/O Support
CCIO
1.5
1.8
2.5
3.3
The PCI clamping diode must be disabled to drive an input with voltages higher than V
input.
These input levels are only allowed if the input standard is set to any V
GTL+, and AGP 2 ). The V
inputs are powered by V
When V
When V
APEX II devices can be 5.0-V tolerant with the use of an external series resistor and enabling the PCI clamping diode.
When V
(V)
Table
CCIO
CCIO
CCIO
v
v
v
1.5 V
v
14:
(2)
(2)
(2)
= 1.8 V, an APEX II device can drive a 1.5-V device with 1.8-V tolerant inputs.
= 2.5 V, an APEX II device can drive a 1.5-V or 1.8-V device with 2.5-V tolerant inputs.
= 3.3 V, an APEX II device can drive a 1.5-V, 1.8-V, or 2.5-V device with 3.3-V tolerant inputs.
v
v
1.8 V
v
v
(2)
(2)
CCIO
The APEX II VCCINT pins must always be connected to a 1.5-V power
supply. With a 1.5-V V
3.3-V tolerant. The VCCIO pins can be connected to either a 1.5-V, 1.8-V,
2.5-V or 3.3-V power supply, depending on the output requirements. The
output levels are compatible with systems of the same voltage as the
power supply (i.e., when VCCIO pins are connected to a 1.5-V power
supply, the output levels are compatible with 1.5-V systems). When
VCCIO pins are connected to a 3.3-V power supply, the output high is
3.3 V and is compatible with 3.3-V or 5.0-V systems.
Table 14
Open-drain output pins with a pull-up resistor to the 5.0-V supply and a
series register to the I/O pin can drive 5.0-V CMOS input pins that require
a V
by the resistor. The open-drain pin will only drive low or tri-state; it will
never drive high. The rise time is dependent on the value of the pull-up
resistor and load impedance. The I
considered when selecting a pull-up resistor.
Because APEX II devices can be used in a mixed-voltage environment,
they have been designed specifically for any possible power-up sequence.
Therefore, the V
order.
Input Signal
REF
. As a result, input levels below the V
IH
2.5 V
standard inputs are powered by V
v
v
v
v
of 3.5 V. When the pin is inactive, the trace will be pulled up to 5.0 V
summarizes APEX II MultiVolt I/O support.
3.3 V
v
v
v
v
Note (1)
CCIO
APEX II Programmable Logic Device Family Data Sheet
and V
v
5.0 V
CCINT
(5)
CCINT
level, input pins are 1.5-V, 1.8-V, 2.5-V and
v
v
v
1.5 V
v
CCINT
power supplies may be powered in any
CCIO
(3)
(4)
(6)
OL
. LVTTL, PCI, PCI-X, and AGP 1 standard
REF
current specification should be
setting cannot drive these standards.
v
v
1.8 V
standard (i.e., SSTL-3, SSTL-2, HSTL,
v
(4)
(6)
Output Signal
v
2.5 V
CCIO
v
(6)
, except for with a 5.0-V
3.3 V
v
5.0 V
v
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