ep2a40b724i8 Altera Corporation, ep2a40b724i8 Datasheet - Page 83

• Manufacturer Part Number: ep2a40b724i8
• Description: Programmable Logic Device Family
• Manufacturer: Altera Corporation

Altera Corporation
Figure 43. Dual-Port RAM Timing Microparameter Waveform
t
t
t
unreg_data-out
F1-4
F5-20
F20+
Table 49. APEX II f
reg_data-out
wraddress
rdaddress
rdclock
data-in
wrclock
wren
Symbol
rden
doutn-2
an-1
din-1
t
t
ESBDATASU
ESBRESU
doutn-1
bn
MAX
Fan-out delay estimate using local interconnect; use to estimate routing delay for a signal
with fan-out of 1 to 4
Fan-out delay estimate using MegaLab interconnect; use to estimate routing delay for a
signal with fan-out of 5 to 20
Fan-out delay estimate using FastTrack interconnect; use to estimate routing delay for a
signal with fan-out greater than 20
Routing Delays
t
ESBDATAH
din
an
t
doutn-1
ESBWEH
doutn
din0
a0
b0
t
ESBREH
t
ESBDATACO1
t
ESBDATACO2
din1
a1
APEX II Programmable Logic Device Family Data Sheet
t
ESBSRC
doutn
dout0
Parameter
din2
a2
b1
t
ESBADDRSU
t
din3
ESBWESU
a3
dout0
din4
a4
b2
t
ESBADDRH
din5
a5
b3
din6
a6
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