at85c51snd3 ATMEL Corporation, at85c51snd3 Datasheet - Page 125
at85c51snd3
Manufacturer Part Number
at85c51snd3
Description
At85c51snd3 Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet
1.AT85C51SND3.pdf
(271 pages)
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7632D–MP3–01/07
Table 128. UEDATX Register
UEDATX (1.D3h) – USB Endpoint Data Register
Reset Value = 0000 0000b
Table 129. UEBCHX Register
UEBCHX (1.D4h) – USB Endpoint Byte Counter High Register
Reset Value = 0000 0000b
Table 130. UEBCLX Register
UEBCLX (1.D5h) – USB Endpoint Byte Counter Low Register
Reset Value = 0000 0000b
Number
Number
Number
BYCT7
DAT7
7-0
7-3
2-0
7-0
Bit
Bit
Bit
7
7
7
-
Mnemonic Description
Mnemonic Description
Mnemonic Description
BYCT10:8
BYCT7:0
DAT7:0
BYCT6
DAT6
Bit
Bit
Bit
6
6
6
-
-
Data Bits
Set by the software to read/write a byte from/to the endpoint FIFO selected by
EPNUM.
Reserved
The value read from these bits is always 0. Do not set these bits.
Byte count (high) Bits
Set by hardware. This field is the MSB of the byte count of the FIFO endpoint.
The LSB part is provided by the UEBCLX register.
Byte Count (low) Bits
Set by the hardware. BYCT10:0 is:
- (for IN endpoint) increased after each writing into the endpoint and
decremented after each byte sent,
- (for OUT endpoint) increased after each byte sent by the host, and
decremented after each byte read by the software.
BYCT5
DAT5
5
5
5
-
BYCT4
DAT4
4
4
4
-
BYCT3
DAT3
3
3
3
-
BYCT10
BYCT2
DAT2
2
2
2
BYCT9
BYCT1
DAT1
1
1
1
BYCT8
BYCT0
DAT0
0
0
0
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