at85c51snd3 ATMEL Corporation, at85c51snd3 Datasheet - Page 52

• Manufacturer Part Number: at85c51snd3
• Description: At85c51snd3 Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
• Manufacturer: ATMEL Corporation

Registers
52
AT85C51SND3B
The Figure 27 shows the memory segments configuration after bootstrap execution
along with an example of user memory segments configuration done during firmware
start-up. In this figure italicized address are the logical address within segments.
Figure 27. Memory Segment Configuration
Table 64. PSW Register
PSW (S:8Eh) – Program Status Word Register
Reset Value = 0000 0000b
Number
FFFFh
FEFFh
EFFFh
FF00h
F000h
0000h
CY
4-3
Bit
7
7
6
5
2
1
0
00h
000h
0000h
3840-byte XDATA
60-Kbyte CODE
256-byte DATA
Default Configuration
Mnemonic Description
RS1:0
AC
CY
AC
OV
Bit
F0
F1
P
6
EFFFh
EFFh
Carry Flag
Carry out from bit 1 of ALU operands.
Auxiliary Carry Flag
Carry out from bit 1 of addition operands.
User Definable Flag 0
Register Bank Select Bits
Refer to Table 63 for bits description.
Overflow Flag
Overflow set by arithmetic operations.
User Definable Flag 1
Parity Bit
Set when ACC contains an odd number of 1’s.
Cleared when ACC contains an even number of 1’s.
FFh
MEMDBAX = 7Fh
MEMXBAX = 78h
MEMXSX = 0Eh
MEMCSX = EFh
MEMCBAX = 00h
F0
5
RS1
4
RS0
DFFFh
FEFFh
FFFFh
3
FF00h
E000h
0000h
User Configuration Example
00h
000h
0000h
7936-byte XDATA
56-Kbyte CODE
256-byte DATA
OV
2
DFFFh
1EFFh
FFh
F1
1
MEMDBAX = 7Fh
MEMXBAX = 70h
MEMXSX = 1Eh
MEMCSX = DFh
MEMCBAX = 00h
7632D–MP3–01/07
P
0