at85c51snd3 ATMEL Corporation, at85c51snd3 Datasheet - Page 189
at85c51snd3
Manufacturer Part Number
at85c51snd3
Description
At85c51snd3 Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet
1.AT85C51SND3.pdf
(271 pages)
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7632D–MP3–01/07
Reset Value = 0000 0000b
Table 214. NFECC Register
NFECC (1.A4h) – Nand Flash Controller ECC 1 and ECC 2 Register
Reset Value = 0000 0000b
Table 215. NFINT Register
NFINT (1.A5h) – Nand Flash Controller Interrupt Register
Reset Value = 0000 0000b
Number
Number
Number
NFED7
7-0
7-5
Bit
Bit
Bit
0
7
7
4
3
2
1
0
-
Mnemonic Description
Mnemonic Description
Mnemonic Description
ECCRDYI
ECCERRI
NFED7:0
NFRUN
NFED6
SMCTI
STOPI
ILGLI
Bit
Bit
Bit
6
6
-
-
Running Flag
Set by hardware to signal that it is currently running.
Cleared by hardware to signal it is not running.
Nand Flash ECC 6-byte Data FIFO
Read Mode
Sequential reading returns 2 ECC values of 3 bytes.
Write Mode
Writing any data resets the ECC engine and the FIFO manager.
Reserved
The value read from these bits is always 0. Do not set these bits.
SmartMedia Card Transition Interrupt Flag
Set by hardware every time SMCD bit in NFSTA is toggling.
Shall be cleared by software.
ILLEGAL operation Interrupt Flag
Set by hardware when an illegal operation is performed.
Shall be cleared by software.
ECC Ready Interrupt Flag
Set by hardware when the ECCs (6 bytes) are ready for operation.
This bit is set/clear even if the spare zone is automatically managed (ECCEN).
Shall be cleared by software.
ECC Error Interrupt Flag
Set by hardware when a bad ECC is seen.
Shall be cleared by software.
Stop Interrupt Flag
Set by hardware when a running (NFRUN= 1) to not running (NFRUN= 0)
transition is met (end of page, end of data transfer, …)
Shall be cleared by software.
NFED5
5
5
-
NFED4
SMCTI
4
4
NFED3
ILGLI
3
3
ECCRDYI
NFED2
2
2
ECCERRI
NFED1
1
1
NFED0
STOPI
0
0
189
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