at85c51snd3 ATMEL Corporation, at85c51snd3 Datasheet - Page 146
at85c51snd3
Manufacturer Part Number
at85c51snd3
Description
At85c51snd3 Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet
1.AT85C51SND3.pdf
(271 pages)
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AT85C51SND3B
Reset Value = 0000 0000b
Table 149. UPIENX Register
UPIENX (1.D2h) – USB Pipe Interrupt Enable Register
Reset Value = 0000 0000b
Table 150. UPDATX Register
UPDATX (1.D3h) – USB Pipe Data Register
FLERRE
Number
Number
PDAT7
Bit
Bit
0
7
7
6
5
4
3
2
1
0
7
RXSTALLE
Mnemonic Description
Mnemonic Description
NAKEDE
NAKEDE
FLERRE
TXOUTE
TXSTPE
PERRE
RXINE
PDAT6
RXINI
Bit
Bit
6
6
-
IN Data received
Set by hardware when a new USB message is stored in the current bank of the
Pipe. This triggers an interrupt if the RXINE bit is set in the UPIENX register.
Shall be cleared to handshake the interrupt. Setting by software has no effect.
Flow Error Interrupt enable
Set to enable the OVERFI and UNDERFI interrupts.
Clear to disable the OVERFI and UNDERFI interrupts.
NAK Handshake Received Interrupt Enable
Set to enable the NAKEDI interrupt.
Clear to disable the NAKEDI interrupt.
Reserved
The value read from this bit is always 0. Do not set this bit.
PIPE Error Interrupt Enable
Set to enable the PERRI interrupt.
Clear to disable the PERRI interrupt.
SETUP Bank ready Interrupt Enable
Set to enable the TXSTPI interrupt.
Clear to disable the TXSTPI interrupt.
OUT Bank ready Interrupt Enable
Set to enable the TXOUTI interrupt.
Clear to disable the TXOUTI interrupt.
STALL Received Interrupt Enable
Set to enable the RXSTALLI interrupt.
Clear to disable the RXSTALLI interrupt.
IN Data received Interrupt Enable
Set to enable the RXINI interrupt.
Clear to disable the RXINI interrupt.
PDAT5
5
5
-
PERRE
PDAT4
4
4
TXSTPE
PDAT3
3
3
TXOUTE
PDAT2
2
2
RXSTALLE
PDAT1
1
1
7632D–MP3–01/07
PDAT0
RXINE
0
0
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