at85c51snd3 ATMEL Corporation, at85c51snd3 Datasheet - Page 72
at85c51snd3
Manufacturer Part Number
at85c51snd3
Description
At85c51snd3 Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet
1.AT85C51SND3.pdf
(271 pages)
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AT85C51SND3B
Table 82. TMOD Register
TMOD (0.89h) – Timer/Counter Mode Control Register
Reset Value = 0000 0000b
Table 83. TH0 Register
TH0 (0.8Ch) – Timer 0 High Byte Register
Reset Value = 0000 0000b
Number
Number
GATE1
7-0
Bit
Bit
7
7
6
5
4
3
2
1
0
7
-
Mnemonic Description
Mnemonic Description
GATE1
GATE0
C/T1#
C/T1#
C/T0#
M11
M01
M10
M00
Bit
Bit
6
6
-
Timer 1 Gating Control Bit
Clear to enable Timer 1 whenever TR1 bit is set.
Set to enable Timer 1 only while INT1 pin is high and TR1 bit is set.
Timer 1 Counter/Timer Select Bit
Clear for Timer operation: Timer 1 counts the divided-down system clock.
Set for Counter operation: Timer 1 counts negative transitions on external pin T1.
Timer 1 Mode Select Bits
Refer to Table 80 for Timer 1 operation.
Timer 0 Gating Control Bit
Clear to enable Timer 0 whenever TR0 bit is set.
Set to enable Timer/Counter 0 only while INT0 pin is high and TR0 bit is set.
Timer 0 Counter/Timer Select Bit
Clear for Timer operation: Timer 0 counts the divided-down system clock.
Set for Counter operation: Timer 0 counts negative transitions on external pin T0.
Timer 0 Mode Select Bit
Refer to Table 78 for Timer 0 operation.
High Byte of Timer 0
M11
5
5
-
M01
4
4
-
GATE0
3
3
-
C/T0#
2
2
-
M10
1
1
-
7632D–MP3–01/07
M00
0
0
-
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