peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 213

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peb3456

Manufacturer Part Number
peb3456
Description
Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
Channel Interrupt Vector Transmit
TAB
HTAB
UR
TFE
Command Interrupt Vector Transmit
TTC
CSPEC_IMASK
Channel Specification Interrupt Vector Mask Register
Access
Address
Reset Value
For each channel or command related interrupt vector an interrupt vector generation
mask is provided. Generation of an interrupt vector itself does not necessarily result in
assertion of the interrupt pin. For description of interrupt concept and interrupt vectors
see
The following definition applies:
1
0
Data Sheet
31
15
0
0
Chapter
RAB RFE HRAB MFL RFOD CRC ILEN RFOP SF
TAB
30
14
4.13.1.
13
0
: read/write
: 02C
: 00000000
The device will not generate the corresponding interrupt vector, i.e. the
interrupt vector is masked.
An interrupt condition results in generation of the corresponding interrupt
vector.
Mask ’Transmit Abort’
Mask ’Hold Caused Transmit Abort’
Mask ’Transmit Underrun’
Mask ’Transmit Frame End’
Mask ’Transmit Command Complete’
HTAB
28
12
H
11
0
H
10
0
0
9
0
8
213
UR
23
7
TFE
22
6
IFTC
5
0
0
0
Register Description
SFD
0
3
SD
0
2
PEB 3456 E
0
0
05.2001
RCC
TCC
16
0

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