peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 57

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

Masked bits are transmitted as ‘1’. In receive direction masked data bits are
configured in E1 mode and time slots two and three are assigned to logical channel 5.
The bit mask of time slot two is set to FE
Since the receiver and the transmitter operate independently of each other, the
assignment of time slots to logical channels can be done separately in receive and
transmit direction. Any time slot can be assigned to any channel and any sequence of
time slots can be assigned to one channel.
In normal operation each time slot consists of eight bits and all bits are used for data
transmission. An available mask function provides the capability to mask selected bits,
which in turn are disabled for data transmission. This provides the possibility to operate
time slots with less than 64 kBit/s throughput. So, instead of mapping the bit stream of
one logical channel over all bits of the assigned time slots, the bit stream is mapped
continuously over all unmasked bits of the time slots belonging to that channel.
discardedFigure 4-5
the bit mask of the third time slot is set to FD
Data Sheet
shows a simple assignment process. In this case one port is
H
, which disables bit zero of that time slot, and
57
H
, which disables bit one.
Functional Description
PEB 3456 E
05.2001