peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 305

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

Reset Value
D2RFEC
DS2 Receive Framing Bit Error Counters
Access
Address
Reset Value
FE(15:0)
D2RPEC
DS2 Receive Parity Bit Error Counter (ITU-T G.747)
Access
Address
PE(15:0)
Data Sheet
15
15
: read/write
: 238
: 0000
Framing Bit Errors
Error counter mode (Clear on Read or Errored Second) depends on
register D2RCFG.ECM.
For DS1 mode framing bit errors include F-bit and M-bit errors. For G747
mode, individual bits in the Frame Alignment Signal (FAS) are counted.
Errors are not counted in out of frame state.
: read/write
: 23C
: 0000
Parity Errors in ITU-T G.747 mode
Error counter mode (Clear on Read or Errored Second) depends on
register D2RCFG.ECM. Errors are not counted in out of frame state.
H
H
H
H
(PCI), 9C
(PCI), 9E
H
H
(Local bus)
(Local bus)
FE(15:0)
PE(15:0)
305
Register Description
PEB 3456 E
05.2001
0
0