peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 323

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

Access
Address
Reset Value
EC(31:0)
TUREC0
Test Unit Receive Error Counter Low Word
Access
Address
Reset Value
EC(31:0)
TUREC1
Test Unit Receive Error Counter High Word
Data Sheet
15
15
: read
: 2BC
: 0000
Error Counter
See description below.
: read
: 2C0
: 0000
Error Counter
This 32 bit counter counts receive errors detected when receiver is
enabled and in synchronized state. When the ’Bit Error Detected’
interrupt is enabled, it will be asserted and then automatically masked
when this counter is incremented.
Errors are counted in a background register (not directly readable) until:
1. The user asserts command TURCOM.RDC.
2. The end of measurement interval is reached and the last result was
read.
In both cases the value of the background register is copied to
TUREC.EC and the measured values are accessible. An ’End of
H
H
H
H
(PCI), E0
(PCI), DE
H
H
(Local bus)
(Local bus)
EC(31:16)
EC(15:0)
323
Register Description
PEB 3456 E
05.2001
0
0