SAF1562HL NXP [NXP Semiconductors], SAF1562HL Datasheet - Page 26

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SAF1562HL

Manufacturer Part Number
SAF1562HL
Description
Hi-Speed Universal Serial Bus PCI Host Controller
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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NXP Semiconductors
SAF1562_1
Product data sheet
8.2.3.4 PMCSR register
Table 34.
Address: Value read from address 34h + 2h
The Power Management Control/Status Register (PMCSR) is a 2 B register used to
manage the power management state of the PCI function, as well as to allow and monitor
Power Management Events (PMEs). The bit allocation of the register is given in
Bit
8 to 6
5
4
3
2 to 0
Symbol
AUX_C
[2:0]
DSI
reserved
PMI
VER[2:0] Version: A value of 010b indicates that this function complies with PCI Bus
PMC - Power Management Capabilities register bit description
Description
Aux_Current: This three-bit field reports the V
requirements for the PCI function.
If the Data register is implemented by this function:
If the PME# generation from D3
(PMC[15] = logic 0), this field must return a value of 000b when read.
For functions that support PME# from D3
register, the bit assignments corresponding to the maximum current required
for V
111b — 375 mA
110b — 320 mA
101b — 270 mA
100b — 220 mA
011b — 160 mA
010b — 100 mA
001b — 55 mA
000b — 0 (self powered)
Device Specific Initialization: This bit indicates whether special
initialization of this function is required, beyond the standard PCI
configuration header, before the generic class device driver is able to use it.
This bit is not used by some operating systems. For example, Microsoft
Windows and Windows NT do not use this bit to determine whether to use
D3. Instead, it is determined using the capabilities of the driver.
Logic 1 indicates that the function requires a device-specific initialization
sequence, following transition to D0 un-initialized state.
-
PME Clock:
0 — Indicates that no PCI clock is required for the function to generate PME#
1 — Indicates that the function relies on the presence of the PCI clock for the
PME# operation
Functions that do not support the PME# generation in any state must return
logic 0 for this field.
Power Management Interface Specification Rev. 1.1 .
Rev. 01 — 7 February 2007
A read from this field needs to return a value of 000b
The Data register takes precedence over this field for V
requirement reporting
aux(3V3)
are:
Hi-Speed Universal Serial Bus PCI Host Controller
cold
is not supported by the function
cold
and do not implement the Data
aux(3V3)
auxiliary current
SAF1562
© NXP B.V. 2007. All rights reserved.
…continued
aux(3V3)
Table
current
26 of 97
35.

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