SAF1562HL NXP [NXP Semiconductors], SAF1562HL Datasheet - Page 83

• Manufacturer Part Number: SAF1562HL
• Description: Hi-Speed Universal Serial Bus PCI Host Controller
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 122. PCI clock and IO timing
Abstract of the USB specification rev. 2.0.
[1]
SAF1562_1
Product data sheet
Symbol
PCI clock timing; see
T
t
t
SR
SR
PCI input timing; see
t
t
t
PCI output timing; see
t
t
t
t
PCI reset timing
t
HIGH(PCICLK)
LOW(PCICLK)
su(PCICLK)bs
su(PCICLK)ptp
h(PCICLK)
val(PCICLK)bs
val(PCICLK)ptp
dZ(act)
d(act)Z
rst
Fig 7. PCI clock
cyc(PCICLK)
PCICLK
RST#
REQ# and GNT# are point-to-point signals. GNT# has a setup of 10 ns; REQ# has a setup of 12 ns. All others are bus signals.
16.1 Timing
Parameter
PCICLK cycle time
PCICLK HIGH time
PCICLK LOW time
PCICLK slew rate
RST# slew rate
setup time to PCICLK (bus signal)
setup time to PCICLK (point-to-point)
input hold time from PCICLK
PCICLK to signal valid delay (bus signal)
PCICLK to signal valid delay (point-to-point)
float to active delay
active to float delay
reset active time after CLK stable
Figure 8
Figure 7
0.6V
0.5V
0.4V
0.3V
0.2V
Figure 9
CC(I/O)
CC(I/O)
CC(I/O)
CC(I/O)
CC(I/O)
t
Rev. 01 — 7 February 2007
HIGH(PCICLK)
T
cyc(PCICLK)
Hi-Speed Universal Serial Bus PCI Host Controller
Conditions
t
LOW(PCICLK)
[1]
[1]
Min
30
11
11
1
50
7
10
0
2
2
2
-
1
minimum value
0.4V
CC(I/O)
004aaa604
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
SAF1562
© NXP B.V. 2007. All rights reserved.
Max
32
-
-
4
-
-
-
-
11
12
-
28
-
Unit
ns
ns
ns
V/ns
mV/ns
ns
ns
ns
ns
ns
ns
ns
ms
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