SAF1562HL NXP [NXP Semiconductors], SAF1562HL Datasheet - Page 34

• Manufacturer Part Number: SAF1562HL
• Description: Hi-Speed Universal Serial Bus PCI Host Controller
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 43.
Address: Value read from func0 or func1 of address 10h + 00h
Table 44.
Address: Value read from func0 or func1 of address 10h + 04h
[1]
SAF1562_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 8
7 to 0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
HcRevision - Host Controller Revision register bit description
HcControl - Host Controller Control register bit allocation
Symbol
reserved
REV[7:0]
11.1.2 HcControl register
R/W
R/W
R/W
R/W
15
31
23
15
R
R
0
7
0
0
0
0
7
0
HCFS[1:0]
This register defines the operating modes for the Host Controller. All the fields in this
register, except for HCFS and RWC, are modified only by the HCD. The bit allocation is
given in
Description
-
Revision: This read-only field contains the BCD representation of the version of the HCI
specification that is implemented by this Host Controller. For example, a value of 11h
corresponds to version 1.1. All of the Host Controller implementations that are compliant with this
specification need to have a value of 10h.
R/W
R/W
R/W
R/W
14
30
22
14
R
R
0
6
0
0
0
0
6
0
Table
44.
reserved
R/W
R/W
R/W
R/W
BLE
13
29
21
13
R
R
0
5
0
0
0
0
5
0
Rev. 01 — 7 February 2007
[1]
R/W
R/W
R/W
CLE
R/W
12
28
20
12
R
R
0
4
1
0
0
0
4
0
reserved
reserved
REV[7:0]
reserved
Hi-Speed Universal Serial Bus PCI Host Controller
[1]
[1]
R/W
R/W
R/W
R/W
11
27
19
11
IE
R
R
0
3
0
0
0
0
3
0
RWE
R/W
R/W
R/W
PLE
R/W
10
26
18
10
R
R
0
2
0
0
0
0
2
0
RWC
R/W
R/W
R/W
R/W
25
17
R
R
9
0
1
0
0
0
9
0
1
0
SAF1562
© NXP B.V. 2007. All rights reserved.
CBSR[1:0]
R/W
R/W
R/W
R/W
24
16
IR
R
R
8
0
0
0
0
0
8
0
0
0
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