MPC8379E-RDBA Freescale Semiconductor, MPC8379E-RDBA Datasheet - Page 75

BOARD REF DESIGN MPC8379E

MPC8379E-RDBA

Manufacturer Part Number
MPC8379E-RDBA
Description
BOARD REF DESIGN MPC8379E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MPUr
Datasheets

Specifications of MPC8379E-RDBA

Contents
Board
Memory Type
Flash, SDRAM
Interface Type
Ethernet, USB, PCI, UART
Board Size
170 mm x 170 mm
Product
Modules
Silicon Manufacturer
Freescale
Core Architecture
Power Architecture
Core Sub-architecture
PowerQUICC
Silicon Core Number
MPC83xx
Silicon Family Name
PowerQUICC II PRO
Rohs Compliant
Yes
For Use With/related Products
MPC8379E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 53
assumes that the DC levels of the clock driver chip is compatible with device SerDes reference clock
input’s DC requirement.
Figure 54
Since LVDS clock driver’s common-mode voltage is higher than the device SerDes reference clock input’s
allowed range (100 to 400 mV), AC-coupled connection scheme must be used. It assumes the LVDS
Freescale Semiconductor
HCSL CLK Driver Chip
Total 50 Ω. Assume clock driver’s
output impedance is about 16 Ω.
Clock Driver
Clock Driver
Figure 53. DC-Coupled Differential Connection with HCSL Clock Driver (Reference Only)
shows the SerDes reference clock connection reference circuits for HCSL type clock driver. It
shows the SerDes reference clock connection reference circuits for LVDS type clock driver.
CLK_Out
CLK_Out
CLK_Out
Figure 53
fact that clock driver chip's internal structure, output impedance, and
termination requirements are different between various clock driver chip
manufacturers, it is very possible that the clock circuit reference designs
provided by the clock driver chip vendor are different from what is shown
below. They might also vary from one vendor to the other. Therefore,
Freescale Semiconductor can neither provide the optimal clock driver
reference circuits, nor guarantee the correctness of the following clock
driver connection reference circuits. The system designer is recommended
to contact the selected clock driver chip vendor for the optimal reference
circuits with the device SerDes reference clock receiver requirement
provided in this document.
MPC8379E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
to
33 Ω
33 Ω
Figure 56
Clock driver vendor dependent
source termination resistor
100 Ω differential PWB trace
below are for conceptual reference only. Due to the
NOTE
SDn_REF_CLK
SDn_REF_CLK
50 Ω
High-Speed Serial Interfaces (HSSI)
50 Ω
MPC8379E
SerDes Refer.
CLK Receiver
75

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