UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 101

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

(7) A/D port configuration register 0 (ADPC0) ( PD78F041x only)
Address: FF8FH After reset: 08H R/W
Symbol
ADPC0
Cautions 1. Set the channel used for A/D conversion to the input mode by using port mode register 2
This register switches the P20/ANI0 to P25/ANI5 pins to analog input of A/D converter or digital I/O of port.
ADPC0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 08H.
Caution Set the values shown in Figure 4-22 after the reset is released.
ADPC02
7
0
2. The pin to be set as a digital I/O via ADPC, must not be set via ADS, ADDS1 or ADDS0.
3. If data is written to ADPC0, a wait cycle is generated. Do not write data to ADPC0 when the
4. If pins ANI0/P20/SEG21 to ANI5/P25/SEG16 are set to segment output via the PF2 register,
0
0
0
0
1
1
1
(PM2).
CPU is operating on the subsystem clock and the peripheral hardware clock is stopped. For
details, see CHAPTER 29 CAUTIONS FOR WAIT.
output is set to segment output, regardless of the ADPC0 setting (for PD78F041x only).
Other than above
Figure 4-22. Format of A/D Port Configuration Register 0 (ADPC0)
ADPC01
6
0
0
0
1
1
0
0
1
ADPC00
5
0
0
1
0
1
0
1
0
CHAPTER 4 PORT FUNCTIONS
User’s Manual U18698EJ1V0UD
Setting prohibited
/ANI5
P25
D
A
A
A
A
A
A
4
0
/ANI4
P24
Digital I/O (D)/analog input (A) switching
D
D
A
A
A
A
A
3
0
/ANI3
P23
D
D
D
A
A
A
A
ADPC02
2
/AN2
P22
D
D
D
D
A
A
A
ADPC01
1
/ANI1
P21
D
D
D
D
D
A
A
ADPC00
/ANI0
P20
0
D
D
D
D
D
D
A
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