UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 532

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

532
8-bit
operation
Instruction
Notes 1.
Remarks 1. One instruction clock cycle is one cycle of the CPU clock (f
Group
2.
3.
SUB
SUBC
AND
Mnemonic
2. This clock cycle applies to the internal ROM program.
When the internal high-speed RAM area is accessed or for an instruction with no data access
When an area except the internal high-speed RAM area is accessed
Except “r = A”
control register (PCC).
A, #byte
saddr, #byte
A, r
r, A
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, [HL + B]
A, [HL + C]
A, #byte
saddr, #byte
A, r
r, A
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, [HL + B]
A, [HL + C]
A, #byte
saddr, #byte
A, r
r, A
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, [HL + B]
A, [HL + C]
Operands
Note 3
Note 3
Note 3
CHAPTER 26 INSTRUCTION SET
User’s Manual U18698EJ1V0UD
Bytes
2
3
2
2
2
3
1
2
2
2
2
3
2
2
2
3
1
2
2
2
2
3
2
2
2
3
1
2
2
2
Note 1
4
6
4
4
4
8
4
8
8
8
4
6
4
4
4
8
4
8
8
8
4
6
4
4
4
8
4
8
8
8
Clocks
Note 2
8
5
9
5
9
9
9
8
5
9
5
9
9
9
8
5
9
5
9
9
9
A, CY
(saddr), CY
A, CY
r, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
(saddr), CY
A, CY
r, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A
(saddr)
A
r
A
A
A
A
A
A
r
A
A
A
A
A
A
A
A
A
r
r
byte
r
(saddr)
(addr16)
(HL)
(HL + byte)
(HL + B)
(HL + C)
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
(saddr)
A
A
CPU
byte
r
(saddr)
(addr16)
(HL)
(HL + byte)
(HL + B)
(HL + C)
byte
r
(saddr)
(addr16)
(HL)
(HL + byte)
(HL + B)
(HL + C)
(saddr)
(saddr)
CY
) selected by the processor clock
CY
Operation
CY
CY
byte
CY
CY
CY
CY
byte
byte
CY
CY
Z AC CY
Flag