UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 155

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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Quantity
Price
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UPD78F0413GA-GAM-AX
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Quantity:
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UPD78F0413GA-GAM-AX
Manufacturer:
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Quantity:
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Notes 1.
Caution Do not select the valid edge of TI000 as the count clock during the pulse width measurement.
Remarks 1. 8-bit timer/event counter 52 (TM52) output can be selected as the TM00 count clock by setting
Symbol
PRM00
Address: FFBBH
2.
3.
2. f
If the peripheral hardware clock (f
f
If the peripheral hardware clock (f
= 0), when 1.8 V
prohibited.
The external clock from the TI000 pin requires a pulse longer than twice the cycle of the peripheral
hardware clock (f
PRS
PRM002, PRM001, PRM000 = 1, 1, 1. Any frequency can be set as the 16-bit timer (TM00) count
clock, depending on the TM52 count clock and compare register setting values.
f
V
V
PRS
SUB
PRM002
DD
DD
operating frequency varies depending on the supply voltage.
ES101
ES101
ES001
: Peripheral hardware clock frequency
: Subsystem clock frequency
0
0
0
0
1
1
1
1
= 2.7 to 5.5 V: f
= 1.8 to 2.7 V: f
7
0
0
1
1
0
0
1
1
After reset: 00H
Figure 6-9. Format of Prescaler Mode Register 00 (PRM00)
PRM001
ES100
ES000
ES100
0
0
1
1
0
0
1
1
PRS
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00
6
0
1
0
1
0
1
0
1
V
).
DD
PRS
PRS
< 2.7 V, the setting of PRM002 = PRM001 = PRM000 = 0 (count clock: f
PRM000
R/W
Falling edge
Rising edge
Setting prohibited
Both falling and rising edges
Falling edge
Rising edge
Setting prohibited
Both falling and rising edges
0
1
0
1
0
1
0
1
10 MHz
5 MHz
ES001
User’s Manual U18698EJ1V0UD
5
PRS
f
f
f
f
f
f
TI000 valid edge
TM52 output
PRS
PRS
PRS
PRS
PRS
PRS
SUB
) operates on the internal high-speed oscillation clock (f
Note2
/2
/2
/2
/2
) operates on the high-speed system clock (f
2
4
8
ES000
4
TI010 pin valid edge selection
TI000 pin valid edge selection
Note3
Count clock selection
3
0
2 MHz
1 MHz
500 kHz
1.25 MHz
7.81 kHz
32.768 kHz
f
PRS
= 2 MHz
PRM002
2
5 MHz
2.5 MHz
1.25 MHz
2.5 MHz
19.53 kHz
f
PRS
Note1
= 5 MHz
PRM001
1
XH
f
10 MHz
5 MHz
2.5 MHz
625 kHz
39.06 kHz
PRS
) (XSEL = 1), the
PRM000
= 10 MHz
0
RH
) (XSEL
PRS
155
) is

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