UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 173

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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This is an application example where the TO00 output level is to be inverted when the count value has been
captured & cleared.
TM00 is cleared at the rising edge detection of the TI000 pin and it is captured to CR000 at the falling edge
detection of the TI000 pin.
When bit 1 (CRC001) of capture/compare control register 00 (CRC00) is set to 1, the count value of TM00 is
captured to CR000 in the phase reverse to that of the signal input to the TI000 pin, but the capture interrupt signal
(INTTM000) is not generated. However, the INTTM000 signal is generated when the valid edge of the TI010 pin
is detected. Mask the INTTM000 signal when it is not used.
Capture & count clear input
Compare match interrupt
Figure 6-28. Timing Example of Clear & Start Mode Entered by TI000 Pin Valid Edge Input
(TMC003, TMC002)
Compare register
Capture interrupt
(TI000 pin input)
Capture register
(a) TOC00 = 13H, PRM00 = 10H, CRC00, = 03H, TMC00 = 08H, CR010 = 0001H
TM00 register
Operable bits
TO00 output
(INTTM000)
(INTTM010)
(CR000)
(CR010)
(CR000: Capture Register, CR010: Compare Register) (1/2)
0000H
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00
L
00
0000H
0001H
User’s Manual U18698EJ1V0UD
10
M
M
N
N
S
S
P
P
173

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