UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 137

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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(6) CPU clock changing from high-speed system clock (C) to internal high-speed oscillation clock (B)
(7) CPU clock changing from high-speed system clock (C) to subsystem clock (D)
(8) CPU clock changing from subsystem clock (D) to internal high-speed oscillation clock (B)
Status Transition
(C)
Status Transition
(C)
Status Transition
(D)
Remarks 1. (A) to (I) in Table 5-5 correspond to (A) to (I) in Figure 5-15.
(B)
(D)
(B)
2. MCM0:
(Setting sequence of SFR registers)
(Setting sequence of SFR registers)
(Setting sequence of SFR registers)
OSCSELS:
RSTS, RSTOP:
CSS:
Table 5-5. CPU Clock Transition and SFR Register Setting Examples (3/4)
Setting Flag of SFR Register
Setting Flag of SFR Register
Setting Flag of SFR Register
Bit 0 of the main clock mode register (MCM)
Bit 4 of the clock operation mode select register (OSCCTL)
Bits 7 and 0 of the internal oscillation mode register (RCM)
Bit 4 of the processor clock control register (PCC)
CHAPTER 5 CLOCK GENERATOR
User’s Manual U18698EJ1V0UD
Unnecessary if the CPU is operating
with the internal high-speed oscillation clock
RSTOP
with the internal high-speed
OSCSELS
Unnecessary if the CPU is operating
Unnecessary if the CPU is operating
RSTOP
0
oscillation clock
0
1
with the subsystem clock
Confirm this flag
RSTS
is 1.
Waiting for Oscillation
Confirm this flag is 1.
Stabilization
Necessary
RSTS
Unnecessary if
XSEL is 0
MCM0
0
MCM0
CSS
0
1
CSS
0
137

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