UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 127

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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5.6 Controlling Clock
5.6.1 Example of controlling high-speed system clock
used as I/O port pins.
Remark While the microcontroller is operating, a clock that is not used as the CPU clock can be stopped via
The following two types of high-speed system clocks are available.
When the high-speed system clock is not used, the OCD0A/X1/P121 and OCD0B/X2/EXCLK/P122 pins can be
Caution The OCD0A/X1/P121 and OCD0B/X2/EXCLK/P122 pins are in the I/O port mode after a reset
The following describes examples of setting procedures for the following cases.
(1) When oscillating X1 clock
(2) When using external main system clock
(3) When using high-speed system clock as CPU clock and peripheral hardware clock
(4) When stopping high-speed system clock
(1) Example of setting procedure when oscillating the X1 clock
X1 clock:
External main system clock: External clock is input to the EXCLK pin.
<1> Setting P121/X1 and P122/X2/EXCLK pins and selecting X1 clock or external clock (OSCCTL register)
<2> Controlling oscillation of X1 clock (MOC register)
<3> Waiting for the stabilization of the oscillation of X1 clock
Cautions 1. Do not change the value of EXCLK and OSCSEL while the X1 clock is operating.
When EXCLK is cleared to 0 and OSCSEL is set to 1, the mode is switched from port mode to X1
oscillation mode.
If MSTOP is cleared to 0, the X1 oscillator starts oscillating.
Check the OSTC register and wait for the necessary time.
During the wait time, other software processing can be executed with the internal high-speed oscillation
clock.
software settings.
stopped by executing the STOP instruction (see (4) in 5.6.1
system clock, (3) in 5.6.2 Example of controlling internal high-speed oscillation clock, and (4) in
5.6.3 Example of controlling subsystem clock).
release.
EXCLK
2. Set the X1 clock after the supply voltage has reached the operable voltage of the clock to
0
be used (see CHAPTER 27 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS)).
OSCSEL
1
Crystal/ceramic resonator is connected across the X1 and X2 pins.
The internal high-speed oscillation clock and high-speed system clock can be
X1 oscillation mode
Operation Mode of High-
Speed System Clock Pin
CHAPTER 5 CLOCK GENERATOR
User’s Manual U18698EJ1V0UD
Crystal/ceramic resonator connection
P121/X1 Pin
Example of controlling high-speed
P122/X2/EXCLK Pin
127

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