UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 465

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

Notes 1. Do not start operation of these functions on the external clock input from peripheral hardware pins in the
Remark f
Item
System clock
CPU
Flash memory
RAM
Port (latch)
16-bit timer/
event counter 00
8-bit timer/event
counter
8-bit timer
Real-time counter
Watchdog timer
Buzzer output
10-bit successive approximation
type A/D converter
Serial interface
LCD controller/driver
Manchester code generator
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
Subsystem clock
f
RL
2.
stop mode.
f
f
f
f
RH
X
EXCLK
XT
RL
PD78F041x only.
:
STOP Mode Setting
:
:
:
Note 1
:
Note 2
UART0
UART6
Internal high-speed oscillation clock
X1 clock
External main system clock
XT1 clock
Internal low-speed oscillation clock
f
f
f
f
50
51
52
H0
H1
H2
RH
X
EXCLK
XT
Note 1
Clock supply to the CPU is stopped
Operable only when subsystem clock is selected as the count clock
Operable only when subsystem clock is selected as the count clock
Operation stopped
Stopped
Input invalid
Status before STOP mode was set is retained
Status before STOP mode was set is retained
Operation stopped
Status before STOP mode was set is retained
Operable only when TM52 output or TI000 is selected as the count clock
Status before STOP mode was set is retained
Operable only when TI52 is selected as the count clock
Operable only when TM50 output is selected as the count clock during 8-bit timer/event
counter 50 operation
Operable only when f
Operation stopped
Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
Operation stopped
Operable only when TM50 output is selected as the serial clock during 8-bit timer/event
counter 50 operation
Operable
When CPU Is Operating on
Table 19-3. Operating Statuses in STOP Mode
Oscillation Clock (f
Internal High-Speed
When STOP Instruction Is Executed While CPU Is Operating on Main System Clock
CHAPTER 19 STANDBY FUNCTION
User’s Manual U18698EJ1V0UD
RL
RH
, f
)
RL
/2
7
, f
RL
When CPU Is Operating on
/2
9
is selected as the count clock
X1 Clock (f
X
)
External Main System Clock
When CPU Is Operating on
(f
EXCLK
)
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