UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 488

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

(2) Low-voltage detection level selection register (LVIS)
488
Address: FFBFH
Symbol
This register selects the low-voltage detection level.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
The generation of a reset signal other than an LVI reset clears this register to 00H.
LVIS
Note
Cautions 1. Be sure to clear bits 4 to 7 to “0”.
LVIS3
Figure 22-3. Format of Low-Voltage Detection Level Selection Register (LVIS)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
7
0
The value of LVIS is not reset but retained as is, upon a reset by LVI. It is cleared to 00H upon
other resets.
After reset: 00H
2. Do not change the value of LVIS during LVI operation.
3. When an input voltage from the external input pin (EXLVI) is detected, the detection
voltage (V
LVIS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
6
0
Note
EXLVI
CHAPTER 22 LOW-VOLTAGE DETECTOR
LVIS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
5
0
R/W
= 1.21 V (TYP.)) is fixed. Therefore, setting of LVIS is not necessary.
User’s Manual U18698EJ1V0UD
LVIS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
4
0
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
LVI0
LVI1
LVI2
LVI3
LVI4
LVI5
LVI6
LVI7
LVI8
LVI9
LVI10
LVI11
LVI12
LVI13
LVI14
LVI15
LVIS3
3
(4.24 V 0.1 V)
(4.09 V 0.1 V)
(3.93 V 0.1 V)
(3.78 V 0.1 V)
(3.62 V 0.1 V)
(3.47 V 0.1 V)
(3.32 V 0.1 V)
(3.16 V 0.1 V)
(3.01 V 0.1 V)
(2.85 V 0.1 V)
(2.70 V 0.1 V)
(2.55 V 0.1 V)
(2.39 V 0.1 V)
(2.24 V 0.1 V)
(2.08 V 0.1 V)
(1.93 V 0.1 V)
LVIS2
Detection level
2
LVIS1
1
LVIS0
0