XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 217

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XRT84L38IB

Manufacturer Part Number
XRT84L38IB
Description
Network Controller & Processor ICs 8 Ch T1/E1 Framer
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT84L38IB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. 1.0.1
See
Interface block of the framer in MVIP 4.096Mbit/s mode.
The timing diagram of input signals to the framer when running at 4.096Mbit/s mode is shown in
This interface mode is the same as running at 2.048 MHz. The only difference is that the Transmit Input Clock
runs four times faster at 8.192MHz.
When the Transmit Multiplex Enable bit is set to zero and the Transmit Interface Mode Select [1:0] bits are set to
11, the Transmit Back-plane interface of framer is running at a clock rate of 8.192MHz.
The interface consists of the following pins:
F
F
4.1.3.3
IGURE
IGURE
TxSerClk (4MHz)
TxSerClk (2MHz)
TxSerClk (INV)
TxSer
TxSync(input)
TxTSb[0]/TxSig
TxTSClk(INV)
TxTSb[1]/TxFrTD
Figure 31
31. I
32. T
Note: The following signals are not aligned with the signals shown above. The TxTSClk is derived from 1.544MHz transmit clock.
NTERFACING
IMING
T1 Transmit Input Interface - 8.192 MHz
below for how to interface the local Terminal Equipment with the Transmit Payload Data Input
F
D
IAGRAM OF THE
Don't Care
Don't Care
XRT84L38
Equipment
Terminal
Don't Care
1
2
3
I
TO THE LOCAL
NPUT
4
A B
5
6
S
7
C
TxSerClk_0
TxSer_0
TxInClk_0 (4.096MHz)
TxSync_0
TxSerClk_7
TxSer_7
TxInClk_7 (4.096MHz)
TxSync_7
IGNALS TO THE
8
D
1
Don't Care
1
2
2
3
3
T
ERMINAL
4
4
197
A B
5
5
6
6
7
C
7
F
D
8
8
RAMER WHEN RUNNING AT
E
1
Don't Care
QUIPMENT USING
2
3
4
A B
5
Data Input
Data Input
Transmit
Interface
Transmit
Interface
Payload
Payload
6
Chn 0
Chn 7
Don't Care
C
7
XRT84L38
8
D
Don't Care
4.096M
Don't care
OCTAL T1/E1/J1 FRAMER
4.096M
BIT
/
S
1
1
Don't Care
D
2
2
BIT
ATA
Figure 32
3
3
XRT84L38
4
4
/
S
5
5
A B
B
M
6
US
6
ODE
7
C
7
8
D
8

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